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Application Information
Figure 9 is the 2140 MHz application schematic with package pinouts and the circuit component topology.
C1
2.4
L1
4.7 nH
RF IN
pF
5
4
Gnd
Enable
6
3
R1
1.2 k
R2
10
Rbias
C2
0.9 pF
Gain
7
8
Logic
2
1
L2
2.7 nH
R3
620
RF
OUT
L3
Gnd
270 nH
C3
33 pF
C4
.01 uF
Vcc
Figure 9. 2140 MHz Application Schematic
Table 8 shows the electrical characteristics for the 2140 MHz evaluation board.
Table 8. Typical 2140 MHz Evaluation Board Performance
(Vcc = 2.75V, Ta = 25°C)
Characteristic
Symbol
Min
Typ
Max
Unit
R1=1.2 K Ω ( Refer to Figure 9 )
Frequency
f
—
2140
—
MHz
RF Gain
High Gain
Bypass
G
16.7
-5.8
17.7
-4.8
—
—
dB
Output Third Order Intercept Point
High Gain
Bypass
OIP3
15.5
20
17.1
21
—
—
dBm
Input Third Order Intercept Point
High Gain
Bypass
Out Ref P1dB
High Gain
In Ref P1dB
High Gain
IIP3
P1dB
P1dB
-3
24.5
6.7
-11
-0.5
25.7
8
-9.6
—
—
—
—
dBm
dBm
dBm
Noise Figure
High Gain
Bypass
NF
—
—
1.46
4.9
1.75
5.9
dB
Current Draw
High Gain
Bypass
Rbias R1 Value
Icc
—
—
—
—
4.8
4
1.2
5.8
20
—
mA
μ A
k Ω
MC13851 Advance Information, Rev. 2.0
Freescale Semiconductor
15
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